Tag Archives: Q68


Peter Graf issued the following list of features of his proposed FPGA-based Q68 QL compatible board, via QL Forum. Peter says that a version of SMSQ/E is being ported to it, and work is well advanced save for the lack of a mouse driver and ethernet driver at the time of writing. Peter has in the past worked on porting a QLwIP driver for the ethernet system, but it only ever existed for QDOS systems.

Preliminary specs:

  • Plain 68000 core, running approximately at QXL speed
  • 32 MB SDRAM
  • PS/2 keyboard and mouse
  • Two fullsize SDHC card interfaces
  • SER
  • Ethernet
  • Battery buffered realtime clock (battery separate from clock device)
  • Stereo sampled sound output
  • 1024×768 VESA VGA signal, QL modes in hardware, Q60 highcolor modes
  • 8×10 cm board size, fits existing case
  • Extension bus, 8 bit data width
  • Single 5V power supply



  • Maybe Ethernet will exist, but not become a specified feature
  • Will run SMSQ/E with high colour drivers
  • QDOS Classic and Minerva exist, but may not be released+maintained for lack of time
  • Sound quality may be reduced during SDHC card access
  • Further video modes better suitable for Full HD Monitors in consideration for later upgrade
  • Cache and 68020 support in consideration for later upgrade
  • Maybe Q68 will only be possible as tinkerer/community project without official support
  • Q68 is far slower than a Q60! Highres+highcolor screen modes can significantly reduce system speed


There is no news yet as to when the board is likely to make an appearance (a prototype was shown at the QL meeting in Edinburgh a while back), nor who might be building and selling the boards. Peter did caution that although work on porting SMSQ/E was ongoing, all this is subject to his time and health permitting.

Prototype redesigned Q68 board

Q68 board (left), unconnected inside a QL case